Technical Field
The present invention relates to a level shift circuit that shifts the level of a data signal, and a display driver that includes the level shift circuit.
Background Art
In recent years, active matrix displays using a liquid display device or organic EL element have become the mainstream of display devices. In such display devices, a larger screen, higher resolution, and higher image quality such as improvement of video characteristics are demanded, which is causing an increase in voltage amplitude of a signal (gradation signal) supplied to a display panel by a column driver (display driver) that drives the display panel.
On the other hand, due to the demands for high-speed transfer with a smaller number of wiring lines, lower EMI (electro-magnetic interference), and the like, various control signals and picture data signals supplied from the display controller to the column driver are made to have lower amplitude. Inside of the display driver, in order to suppress an increase in the area of a logic circuit that processes a larger amount of data (cost increase) caused by the higher resolution and a larger number of gradation levels, a very fine process is employed, which lowers the power supply voltage of the logic circuit. That is, in a display driver, a lower voltage is required for the input part, and a higher voltage is required for the output part.
In order to achieve this property, a display driver is provided with a level shift circuit that converts a low voltage signal of the input part to a high voltage signal of the output part (see Japanese Patent Application Laid-open Publication No. 2013-131964, for example). The level shift circuit includes a level converter and a buffer part. The level converter is configured to shift the level of a digital signal of low amplitude (VDD1/VSS) to high amplitude (VDD2/VSS) in one phase. The buffer part conducts the impedance conversion on the voltage signal of high amplitude (VDD2/VSS), which was subjected to the level shift.
In the level converter of the level shift circuit, a diode-connected P-channel transistor limits the driving current of a transistor that charges the level shift circuit. That is, the potential of each end of the diode-connected P-channel transistor changes while keeping the potential difference between the two, thereby shortening the period of time in which the P-channel transistor and the N-channel transistor, which constitute an inverter in the buffer part, are turned on at the same time. This makes it possible to suppress the through current, and as a result, the operation speed of the level shift circuit can be improved.